
Europe’s semiconductor sector is in the middle of a €31.5 billion investment cycle covering power electronics, silicon carbide, advanced packaging, and automotive ICs across Germany, France, the Netherlands, Belgium, Ireland, Italy, and the UK, while the Gulf builds AI compute infrastructure and fabless design capability from the ground up. The capital is committed but the workforce is not: Europe faces a projected shortfall of 75,000 semiconductor positions by 2030, with a 52% shortage in hardware engineering candidates and nearly 30% of the existing workforce retiring within the same window. The executives who can lead fab ramps, build compound semiconductor operations, run chip design centres, and establish fabless businesses in new markets are in short supply globally and shorter supply in Europe, and the companies that identify and secure them before roles become urgent will ramp faster and stabilise yield sooner than those that do not. Stanton Chase works with semiconductor clients across EMEA on executive search, leadership assessment, succession planning, and board composition, with direct knowledge of the talent pools, compensation benchmarks, and leadership profiles that chip companies in every major EMEA market are working with today.
The global semiconductor market is projected to grow from $627 billion in 2024 to more than $1 trillion by 2030 at roughly 8.6% annually. Asia Pacific is the largest regional semiconductor market by revenue, with Taiwan dominating advanced foundry manufacturing and South Korea leading in memory, while the United States holds just over 50% of global chip revenues through fabless design, artificial intelligence (AI) processors, and advanced logic. Europe’s position within this picture is uneven as it holds established market leadership in semiconductor equipment, power electronics, automotive-grade analog and mixed-signal integrated circuits (ICs), and research infrastructure, but produces less than 10% of global chip output and has very little presence in leading-edge logic below 10nm, volume memory, or high-volume foundry capacity at Asian scale. The Middle East, by contrast, is building from nearly nothing, using sovereign capital and US diplomatic alignment to assemble AI compute infrastructure and fabless design capability. Neither story is moving slowly, and both are generating leadership demand that the available talent pool cannot yet meet.

The European Union (EU) Chips Act entered into force in 2023 with a target of doubling Europe’s global manufacturing share from 10% to 20% by 2030, but the Court of Auditors concluded in 2025 that this target is very unlikely to be met, not because capital is unavailable but because manufacturing at this scale requires a workforce depth and a senior leadership pipeline that no policy framework can build on its own.
That workforce constraint is compounding with two further pressures that are simultaneously narrowing Europe’s room to maneuver. US export controls have already demonstrated their power to reshape market access overnight. In fact, ASML’s China revenue is projected to fall from 33% of net system sales in 2025 to roughly 20% in 2026, and European equipment companies that operate within Western export control regimes face market constraints that Asian competitors do not. China’s concurrent push to build domestic alternatives across power semiconductors, analog ICs, and automotive electronics, backed by state funding at a scale European policy cannot yet match, puts long-term pressure on the segments where European companies are strongest. The ongoing conflict in the Middle East has disrupted global shipping routes and threatened access to helium, which has no viable substitute in semiconductor manufacturing, and bromine, a material critical to certain fabrication steps where alternative sourcing is limited, illustrating a pattern the industry already knew but rarely priced: supply chains concentrated in a small number of geographic chokepoints are exposed to events well outside the industry’s control. A workforce that cannot yet scale to match capital deployment, market access reshaped by export controls, and supply chains exposed to regional instability are reinforcing one another in ways no single policy instrument was designed to address alone. The EU Chips Act has always carried a security dimension alongside its industrial objectives, but the pace of these geopolitical developments has made that dimension considerably more prominent.
The EU Chips Act rests on three pillars. The first, the Chips for Europe Initiative, funds research and development (R&D), pilot lines, and the technology-transfer infrastructure that moves innovations from research institutions into industrial deployment; the Chips Joint Undertaking is currently supporting five pilot lines with €3.7 billion in European and national funding. The second pillar establishes the manufacturing and investment framework, creating Integrated Production Facility and Open EU Foundry statuses that allow member states to grant state aid for first-of-a-kind facilities, and this is where the over €31.5 billion in approved public and private investment sits. The third pillar establishes the European Semiconductor Board as a coordination and crisis-monitoring mechanism, though the Court of Auditors noted it remains in its early stages. In 2025, all 27 EU member states signed a Chips Act 2.0 declaration, with DIGITALEUROPE separately recommending that a revised act mobilize €200 billion by 2035 and cut approval times for major projects to under seven months. The pressure to move faster is partly competitive: the United States raised its semiconductor tax credit from 25% to 35% under legislation signed in 2025, and the EU has no equivalent. The Commission’s first Chips Act evaluation is due by September 2026.

The approved Pillar II projects show clearly where the capital is going. The largest is the European Semiconductor Manufacturing Company (ESMC) in Dresden, a €10 billion joint venture between Taiwan Semiconductor Manufacturing Company (TSMC), Bosch, Infineon, and NXP backed by €5 billion in German state aid, targeting 480,000 wafers per year at 28/16nm nodes on 300mm; equipment move-in is expected in the second half of 2026, with production targeted for 2027. Infineon is simultaneously expanding its own Dresden site in a €5 billion program for discrete power and analog/mixed-signal ICs, with approximately €1 billion in approved public funding. In Italy, STMicroelectronics is building a €5 billion silicon carbide (SiC) facility in Catania backed by €2 billion in state funding. Silicon Box is constructing a €3.2 billion advanced packaging facility in Novara focused on panel-level and 3D integration, with €1.3 billion in approved state aid. In early 2026, imec opened NanoIC in Leuven, Europe’s largest Chips Act pilot line, backed by €700 million in EU funding.
Europe’s build-out concentrates in two areas where European companies already have market position. The first is power semiconductors, automotive-grade specialty nodes, analog, and sensors. Automotive semiconductors are growing five times faster than the overall automotive market, surging from $68 billion to $132 billion globally between 2024 and 2030 at 10% annually, driven by electric vehicle (EV) powertrain and renewable energy infrastructure demand that runs directly through the supply chains where Infineon, STMicroelectronics, Bosch, and the major Tier-1s are already well-positioned. Demand from industrial automation, energy infrastructure, and fifth-generation (5G) radio frequency components adds further growth well beyond vehicle production cycles. The broader compound semiconductor device market is on track to reach $25 billion by 2030 at nearly 13% annual growth, fueled by automotive and mobility demand as well as telecom infrastructure. The second area is advanced packaging: Pillar II of the Chips Act explicitly covers investments in packaging, test, and assembly alongside front-end manufacturing, and as chiplet architectures and 3D integration become more central to AI and automotive computing, a growing share of chip performance will be determined at the packaging step rather than the fabrication step. Europe is not trying to close the leading-edge logic distance from Asia through this investment cycle but rather it is building position where it can win.

Gulf investment is moving at a comparable pace relative to its ambition, though toward different ends. Saudi Arabia’s National Semiconductor Hub and the UAE’s Stargate AI campus are demand-creation programs rather than fab-building programs, assembling AI compute infrastructure and fabless design capability that would eventually justify manufacturing investment. The Gulf’s semiconductor footprint remains a fraction of Europe’s in absolute terms, and it is worth understanding that distinction clearly before the country-by-country analysis that follows.
Germany’s chip market is projected to grow to a degree no other European country matches at roughly 6% annually through 2030, but that headline figure understates the concentration of growth in specific segments. Germany’s automotive semiconductor market is growing at roughly 12% annually, driven by electrification, advanced driver assistance systems (ADAS), and vehicle networking. The SiC market is projected at a 25.7% compound annual growth rate through 2030, fueled by demand from EV powertrain inverters, renewable energy converters, and industrial drives. Beyond automotive, German semiconductor companies are seeing demand from gallium nitride (GaN) for onboard chargers and charging infrastructure, precision analog ICs and microcontrollers (MCUs) for Siemens and Bosch Rexroth’s automation platforms, and RF components for 5G and industrial connectivity. Consequently, companies still framing their German talent strategy purely around automotive will be competing in the wrong part of the market.
The Dresden cluster, producing roughly one third of all chips made in Europe, integrates GlobalFoundries, Bosch, Infineon, Fraunhofer, TU Dresden, and Max Planck into one of the continent’s densest semiconductor ecosystems. Silicon Saxony’s own cluster publications document the structured pathways that move engineers from study at TU Dresden into applied research at Fraunhofer institutes and then into industry roles carrying process and device knowledge that takes years to build anywhere else. In the authors’ view, this talent pipeline is the primary reason Europe consistently holds up Silicon Saxony as the benchmark for what a functioning semiconductor cluster really looks like. Infineon operates established power semiconductor and automotive IC manufacturing in Dresden and is adding a €5 billion Smart Power Fab for power and analog/mixed-signal ICs, with EU Chips Act funding approved in early 2025 and production opening scheduled for 2026. Bosch runs automotive IC and power semiconductor fabrication facilities (fabs) in Dresden and Reutlingen, with microelectromechanical systems (MEMS) sensor production on 300mm wafers planned for Dresden by 2027. Siltronic supplies high-purity silicon substrates to European and global fabs, and Elmos produces the automotive mixed-signal ICs that increasingly define modern vehicle electronic architecture.

The leadership profiles Germany’s expansion requires are specific and rare globally, and rarer still in Europe. Executives who can combine semiconductor process or device knowledge with operational excellence in high-volume manufacturing and an understanding of automotive and industrial market qualification cycles are the profiles every German company is competing for simultaneously. The multibillion-euro fab expansions at GlobalFoundries, Infineon, and Bosch have created structural demand for fab general managers, operations executives, technical program leaders, and supply chain transformation leaders who have done this before, and the people with proven track records in leading high-volume fab ramps predominantly sit in Taiwan, South Korea, the United States, and Japan. Automotive original equipment manufacturers (OEMs) including Volkswagen and BMW are now deepening their semiconductor strategies and recruiting from the same talent pool as the chip companies, which tightens it further. In the authors’ experience working across this market, Germany’s hierarchical decision-making culture and longer offer timelines are a consistent disadvantage when competing for internationally mobile candidates, and European compensation structures, particularly around equity, are not yet calibrated to what those candidates expect from counterparts at firms in the United States and Asia. Companies that have addressed those two structural disadvantages explicitly are consistently ahead of those that have not.

France holds a leading global position in FD-SOI technology (fully depleted silicon-on-insulator), which offers power-efficiency advantages for automotive, Internet of Things (IoT), and edge AI where performance-per-watt matters more than transistor density, and that leadership was built through a cluster model the rest of Europe is still trying to replicate. CEA-Leti (the French Atomic Energy Commission’s microelectronics and nanotechnology research institute) in Grenoble, one of the world’s leading nonprofit semiconductor research organizations, anchors the ecosystem through the Minatec innovation campus, where education, research, and industry operate in a single location. In France, the Grenoble region is home to a truly impressive concentration of companies in the tech, electronics, and semiconductor sectors.

STMicroelectronics focuses on SiC power modules, microcontrollers, and electrification products well-positioned on the EV and industrial megatrends driving European chip demand through 2030. Soitec serves mobile, automotive, and AI edge markets. Dolphin Semiconductor, formed in November 2024 after Jolt Capital acquired the mixed-signal IP activities of Dolphin Design and committed €26 million to the new entity, develops power management and signal processing IP for IoT and automotive. SiPearl, backed by France 2030 and Horizon Europe, is designing the processors for Europe’s exascale supercomputers. NXP has a material French presence in automotive networking, radar, and secure connectivity. The global automotive semiconductor market, the primary revenue driver for STMicroelectronics and NXP’s French operations, gives these companies a durable demand backdrop regardless of what happens at Crolles.
The flagship Crolles megafab, a €7.5 billion joint project between STMicroelectronics and GlobalFoundries, stalled mid-2025 when GlobalFoundries slowed its participation, freezing public funding tied to milestone-based disbursement rules. EU state aid rules tie disbursement to co-investment milestones, which means that when a major partner steps back, public funding freezes automatically regardless of whether the project is paused or dead, and France cannot legally continue subsidizing the program without a formally revised and Commission-approved plan. STMicroelectronics has continued expanding within its existing Crolles perimeter independently, and the French government continues to treat the project as important for European chip sovereignty. In late 2025, the European Investment Bank approved a €1 billion credit line to STMicroelectronics, with approximately 60% allocated to high-volume manufacturing at its Catania, Agrate, and Crolles sites and the remainder to R&D. France’s engineering graduate pipeline falls well short of national industry demand, and semiconductor leadership roles are competing for scarce senior talent in a market the Crolles uncertainty has made more cautious. The profiles in highest demand are process engineers with FD-SOI experience, executives who can manage the complex multi-party public-private investment structures that French and EU programs require, and R&D leaders who know how to translate CEA-Leti pilot line output into commercially viable industrial processes. That last profile is concentrated almost entirely in Grenoble.

ASML, which surpassed $500 billion in market value in January 2026, is the world’s only supplier of extreme ultraviolet (EUV) lithography systems and the dominant supplier of the deep ultraviolet (DUV) machines that make up the bulk of installed capacity globally. China accounted for 33% of ASML’s full-year 2025 net system sales, and ASML has guided for China to represent approximately 20% of 2026 revenue as export controls tighten further. China built a prototype EUV machine in Shenzhen using former ASML engineers, though working production at scale is assessed as unlikely before 2028. ASM International is the global leader in atomic layer deposition (ALD), the deposition technique required at virtually every advanced logic and memory node, making the Dutch equipment cluster a chokepoint in the global chip supply chain that extends well beyond lithography.

That chokepoint extends into the back-end of the manufacturing process through Besi (BE Semiconductor Industries). As Besi’s own SVP of Technology told EE Times in late 2025, transistor density is still increasing but at a slower rate, and for many high-performance chips the answer is now to split the die and reassemble it using advanced packaging rather than wait for the next process node. Gate-all-around transistors continue to push front-end scaling forward, but the performance gains that matter most to AI and high-performance computing are increasingly determined at the assembly step. Q4 2025 orders of €250 million more than doubled year-on-year, driven by demand for 2.5D AI compute packaging, and reported acquisition interest from Lam Research and Applied Materials in early 2026 reflects how quickly the rest of the industry has reached the same conclusion. All of which means the Dutch equipment cluster is competing for three distinct and largely non-overlapping leadership profiles simultaneously, a pressure the talent market was not built to absorb.
ASML’s scale and compensation levels create a gravitational pull on technical leadership talent that leaves the broader Dutch ecosystem competing for what remains. NXP, which announced plans to cut its workforce by up to 5% in early 2025 after 2024 revenue fell 5% year-on-year, is the most visible example of a company caught between ASML’s pull and a weakening automotive and industrial cycle. ASML itself announced approximately 1,700 job cuts in January 2026 as part of a restructuring of technical functions, though demand, which ASML guided will grow 4 to 19% in 2026, is not the driver. The Dutch government allocated €2.51 billion through Project Beethoven, targeting 38,000 additional technically trained workers by 2030, but for companies hiring senior technical leadership today that timeline changes nothing. The leadership profiles the Dutch equipment sector requires are hybrid profiles that do not come from a single academic or industry background: precision mechatronics, optics, process control software, metrology and inspection, and field service engineering for customers running 24/7 fab operations. Companies in this ecosystem that have built structured pathways from physics and mechanical engineering degrees into semiconductor equipment careers will have an advantage over those still waiting for experienced candidates to appear.

Imec in Leuven is the world’s largest independent nanoelectronics R&D center, with €1 billion in revenue and more than 600 industry partners in 2024. Its alumni populate leadership roles across European and global semiconductor companies in a way that makes it a talent reservoir as much as a research institution. The NanoIC pilot line, opened in early 2026 backed by €700 million in EU funding, positions imec at the center of Europe’s effort to bridge research-stage technology and production-ready processes, the most underdeveloped link in the Chips Act’s delivery chain. The leadership profiles imec produces are among the most sought-after in the European semiconductor market, which is precisely why Belgian semiconductor companies face a structural retention problem; the international opportunities available to an imec-trained engineer are considerably broader than anything the Belgian domestic market alone can offer.

Ireland’s semiconductor sector is more consequential than its profile in European industry discussions usually reflects. Over 20,000 people work in Irish semiconductors across a sector that contributes more than €13 billion in annual exports; 15 of the world’s top 30 semiconductor companies operate there; and the ecosystem spans Intel, Analog Devices, Infineon, AMD, Qualcomm, ARM, Cadence, and Synopsys across manufacturing, design, electronic design automation (EDA), and R&D. In 2025, the Irish government launched Silicon Island, its first national semiconductor strategy. Intel’s Fab 34 in Leixlip officially opened in early 2026 with €17 billion invested and 1,600 new permanent roles, running Intel 4 and Intel 3 (3nm) processes on EUV lithography; Intel sold a 49% stake in a joint venture with Apollo for $11 billion while retaining 51% and full operational control. Beyond Fab 34, the ecosystem includes Qualcomm’s chip design center of excellence in Cork and Tyndall National Institute, Ireland’s primary semiconductor research organization covering photonics, compound semiconductors, and advanced packaging. Ireland ranks top three in the EU for semiconductor-related foreign direct investment by both capital and jobs created, and Irish semiconductor employers have been internationally recruiting as a matter of necessity for decades, building competitive relocation packages and faster hiring processes that give them a consistent edge over better-known European names.

Italy’s Silicon Box advanced packaging facility in Novara, which received EU state aid approval in 2024, is Europe’s most ambitious dedicated investment in chiplet-era packaging capability. The €3.2 billion project, backed by €1.3 billion in approved state aid and targeting full capacity by 2033, focuses on panel-level and 3D integration. STMicroelectronics anchors a major manufacturing base in Catania, where the €5 billion SiC expansion backed by €2 billion in state funding covers the full SiC value chain. Italy does not yet have a semiconductor cluster with the self-reinforcing talent dynamics of Silicon Saxony or Grenoble; the investments being made are positioning it to build one, but the education and research infrastructure that would anchor such a cluster is not yet in place at the same depth. The most viable candidates for the leadership roles these facilities require are people who built experience at TSMC, ASE, or Amkor; what converts those conversations is demonstrating that the project is real, funded, and led by people who have done this before.

The United Kingdom sits outside the EU Chips Act framework but has a semiconductor industry considerably more developed than its profile in European policy discussions suggests. Cambridge anchors a world-class chip design and intellectual property (IP) ecosystem built around Arm, whose central processing unit (CPU) technology is found in over 99% of the world’s smartphones, with an active design and EDA presence from AMD, Apple, and Synopsys alongside it. South Wales hosts CSconnected, the world’s first compound semiconductor cluster, combining IQE, Newport Wafer Fab, Cardiff University, and Swansea University; in early 2025, Vishay Intertechnology committed £250 million to Newport Wafer Fab for advanced SiC manufacturing. The government’s National Semiconductor Strategy commits £1 billion over 20 years to design leadership and compound semiconductor scale-up, alongside a ChipStart incubator and a £35 million investment in chip-design curricula. The UK’s position outside the Chips Act creates a state aid disadvantage its companies cannot fully offset, but it also leaves room for a complementary specialization in compound semiconductors and fabless design where the Act’s coverage is thinnest. The leadership profiles needed in Cambridge, chip architects and IP licensing executives, are entirely different from those needed in South Wales, compound semiconductor process engineers and operations executives who can scale manufacturing from a research base, and the employers that understand the distinction recruit more effectively for both.

Israel is the most consequential semiconductor country in the Middle East by a margin that rarely appears in European industry coverage. The country has more than 250 active semiconductor companies employing 45,000 people, with Intel (9,300 employees) and Nvidia (5,500) among the largest, and has generated over $40 billion in cumulative startup exits since 1996. Intel operates a manufacturing facility in Kiryat Gat alongside R&D centers in Haifa, Petah Tikva, and Jerusalem; Tower Semiconductor is an independent specialty foundry focused on analog, RF, complementary metal-oxide-semiconductor (CMOS) image sensors (CIS), and power management. Israeli engineers were central to Intel’s Gaudi AI processors, Amazon’s Graviton CPUs, and Nvidia’s data center interconnects, with landmark exits including Mellanox (acquired by Nvidia for $6.9 billion), Mobileye (acquired by Intel for $15.3 billion), and Habana Labs (also acquired by Intel). Israel attracts roughly one dollar in semiconductor venture investment for every five invested in equivalent US companies, and annual private investment has stabilized at $400 to 500 million, with median round sizes two to four times the national tech average, reaching $35 million in 2025. Israel and Jordan together account for roughly two-thirds of global bromine production, a material used in certain fabrication steps, and the ongoing regional conflict has placed both that supply and regional logistics under active pressure. Israel’s semiconductor talent base remains world-class, but the operational environment is more constrained than it was twelve months ago.

The chip export approvals granted in 2025 are the clearest marker of how quickly the Gulf picture has moved. The US Commerce Department authorized up to 35,000 Nvidia Blackwell chips each to Saudi AI company HUMAIN and United Arab Emirates (UAE) company G42, with conditions tied to security and end-use monitoring that reflect how seriously Washington views both countries as aligned partners. Saudi Arabia’s National Semiconductor Hub launched in mid-2025 with a $266 million fund targeting 50 fabless companies by 2030; the UAE’s Stargate AI campus was announced as a 1-gigawatt compute cluster in Abu Dhabi; Samsung and SK Hynix signed initial memory supply agreements as part of South Korea’s broader involvement. Both Saudi Arabia and the UAE are building the technology base they will need when oil is no longer the primary engine of their economies, and semiconductors, AI compute infrastructure, and chip design capability are part of that foundation rather than an end in themselves. For executive search in the Gulf, demand is immediate, especially for chip design leaders, AI infrastructure operators, and executives who can build fabless operations in a market where the talent pool is being assembled alongside the industry itself. Saudi Arabia and the UAE are not losing experienced semiconductor leaders to retirement like many markets are; they never had them, and every chip design director or fab operations head hired into the region in the next five years will come from somewhere else. The Gulf’s compensation packages are competitive, but the region has to offer more than salary to retain people building careers rather than completing assignments.

According to the European Chips Skills Academy 2025 strategy, nearly 30% of Europe’s semiconductor workforce is expected to retire by 2030, while graduate inflow is growing by less than 1% per year, producing an estimated annual shortfall of approximately 10,800 skilled workers across the value chain. The ECSA 2024 Skills Strategy puts this into perspective by citing a 52% shortage in candidates for hardware engineering roles and a 31% shortage in technician roles.

However, Europe has adjacent talent in automotive manufacturing, industrial automation, energy infrastructure, and defense electronics that already understands the reliability culture and process discipline semiconductor production demands. The conversion pathway from a Tier-1 automotive process engineer to a semiconductor fab operations role is achievable with the right training program covering cleanroom readiness, statistical process control discipline, tool safety, and vacuum systems basics. Few companies have built those programs, but the ones that have are consistently reaching mid-level supply faster than those waiting for semiconductor-native candidates. Cross-sector reskilling is not a consolation prize but rather the fastest available route to a workforce at the scale the current investment cycle requires.

Building dual pipelines, one through vocational and graduate routes for volume and one through international recruitment for experienced specialists, with the lead-time discipline of a capital project plan rather than the reactivity of a vacancy-driven hiring process, is also what separates a fab that ramps on schedule from one that does not. Workforce demand needs to be modeled by ramp phase from construction through tool install, qualification, yield ramp, and high-volume manufacturing, with hiring started early for the roles that cannot be accelerated later. In cluster regions where companies face wage pressure, the differentiators change from salary to relocation support, predictable shift models, and clear progression ladders, because an engineer who can see a path from technician to module lead to integration lead will stay in a way that one recruited purely on compensation will not.
Europe’s semiconductor investment is real, Gulf investment is advancing, and the demand from automotive, industrial, energy, medical, and AI applications is durable across the region. What determines whether EMEA converts capital commitments into operating fabs and functioning fabless ecosystems at the required pace is whether the right leadership is in place, at the right levels, at the right time. The executives who can lead a fab ramp in Dresden, build a compound semiconductor manufacturing operation in Newport, run a chip design center in Cork, or establish a fabless business in Riyadh are in short supply globally and even shorter supply in Europe, and the companies that identify and secure them well ahead of need will move faster than those that do not.
Companies that treat leadership acquisition as a capital allocation decision, mapping executive demand against ramp timelines with the same discipline applied to equipment procurement and building international pipelines well before roles become urgent, will ramp faster and stabilize yield sooner than those that treat it as a hiring problem to solve when a vacancy opens. Companies that also invest in compensation architecture, relocation infrastructure, and career development propositions that can compete with offers from Taiwan, South Korea, and the United States will retain what they recruit. And companies that build conversion programs bringing adjacent talent from automotive, industrial automation, and defense electronics into semiconductor roles will not be held hostage by a market that cannot supply enough semiconductor-native candidates at the required scale.
Stanton Chase maintains offices across EMEA working with semiconductor clients on executive search, leadership assessment and development, succession planning, and board composition, with direct knowledge of cross-border compensation trends, talent pools, and leadership profiles that semiconductor companies in Germany, France, the Netherlands, Belgium, Ireland, Italy, the United Kingdom, Israel, and the Middle East are working with right now.
Jan-Bart Smits is Managing Partner at Stanton Chase Amsterdam and Global Subsector Leader for Semiconductors. With over 30 years in executive search, including 12 years at Korn/Ferry International across Amsterdam and Dubai, Jan-Bart specializes in the semiconductor industry, technology, and professional services. He has held various global leadership roles at Stanton Chase, including Global Practice Leader for Technology and Professional Services, and Global Chair. He holds an MSc in Astrophysics from Leiden University.
Dr. Oliver Ziehm is a Partner at Stanton Chase Düsseldorf with over 20 years of experience in consulting. He’s also the Global Sector Leader for Technology and Professional Services. Prior to joining Stanton Chase, he worked at Kienbaum, PriceWaterhouseCoopers, IBM and CSC, where he built a vast international network in IT and consulting. Dr. Ziehm completed his studies in business administration at Cologne University, HEC Hautes Etudes Commerciales in Paris, and Wroclaw University of Economics in Poland. He has a Ph.D. in Business from Breslau University and is also a certified business coach.
Benoît Duretz is a Partner at Stanton Chase Paris and Lyon, and the Global Subsector Leader for Power Systems and Utilities within the firm’s Energy, Resources, and Mining practice. The semiconductor segments driving Europe’s current investment cycle, including silicon carbide, power electronics, EV powertrain, and renewable energy infrastructure, are the same industrial and energy markets where Benoît has spent 25 years in operational and management roles, giving him a working understanding of the leadership demands these businesses place on the executives who run them. Before joining Stanton Chase, he held C-level business development positions across large and mid-sized industrial organizations, frequently building teams and commercial structures from scratch. He holds a degree in electrical systems engineering and is fluent in French, English, and Spanish.
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